7496: Shift Register, 5 Bits (Shift Right, Parallel In, Parallel Out)

This is a 5-bit shift register with outputs and inputs on all stages. Depending on how you use it, you can parallel-load data or serial-shift data to the right. Stage A is nearest the input; stage E is nearest the output. There are two modes, Load and Shift.

To clear the register to all zeros, the normally high Clear input should be briefly brought to ground.

To load data into the register, the desired pattern is set up on the A, B, C, D, E inputs and the normally low Load input should be briefly brought high. This register must be cleared before loading. You cannot change a I aready in the register to a 0 with the Load inputs. The load inputs can only enter 1's or leave 0's already present as they are. A 1 is designed as a high state.

To shift data to the right, the Clear input should be high, the Load input should be low, and data will be shifted one stage to the right on the ground-to-high transition of the Clock input. The clock must be made bounceless and noise free so that only one ground-to-high transition occurs per desired shift. On a shift operation, the information at the Serial input goes to stage A. A goes to B. B goes to C. C goes to D. D goes to E. E goes to the next package down the line or is destroyed.

Remember, you cannot load a low state into this shift register using the parallel inputs.

Pinout
Pin # Pin Assignment
1 Clock
2 Input A
3 Input B
4 Input C
5 Power (+5V)
6 Input D
7 Input E
8 Load
9 Serial In
10 Output E
11 Output D
12 Ground
13 Output C
14 Output B
15 Output A
16 Clear

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