74160: Decade (÷10) Counter (Synchronous, Presettable, Unit-Cascadable)

This is a synchronous, up-only decade counter. For normal counting operation, the Clear input is made high, the P and T Enables are made high and the Load input is left high.

The count advances one count synchronously every time the clock goes from the low to the high state. The circuit triggers on positive edges. Outputs at Q1, Q2, Q4, and Q8 are BCD-weighted.

To clear to zero, the Clear line is brought momentarily to ground, To load a number in parallel, the desired code is placed on the Load inputs L1, L2, L4, and L8 and the Load terminal is briefly brought to ground.

For fully synchronous operation, the Carry Out of the first stage goes to the T Enable of the second. All stages are synchronously driven from the input clock. Refer to data sheet for more design information.

The clock must be properly conditioned to be bounceless and noise free, providing one, and only one, positive edge per desired clocking.

Pinout
Pin # Pin Assignment
1 Clear
2 Clock
3 Input 1
4 Input 2
5 Input 4
6 Input 8
7 P Enable
8 Ground
9 Load
10 T Enable
11 Output 8
12 Output 4
13 Output 2
14 Input 1
15 Carry Out
16 Power (+5V)

Contents